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[VHDL-FPGA-Verilog] XilinxFPGA1.1

Description: 十分钟学会Xilinx FPGA 设计浅显易懂的学习书，为FPGA的初学者提供很好的参考-10 minutes Society of Xilinx FPGA design easy to understand book learning, for FPGA to provide a good reference for beginners
Platform: | Size: 1735680 | Author: 郭子 | Hits:

[Embeded Linux] Customising_PetaLinux

Description: A pristine PetaLinux tree only includes pre-configured platform support for Xilinx FPGA based prototype development boards. The user needs to add their platform into PetaLinux before it can be used to build firmware for their target device. Customising PetaLinux essentially is adding the hardware and software components of an embedded system into the build framework. This chapter will discuss the procedures to add a new embedded system platform support into PetaLinux.
Platform: | Size: 106496 | Author: 打狗队 | Hits:

[VHDL-FPGA-Verilog] sdram_ver_134

Description: This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is based Xilinx FPGA Playform.
Platform: | Size: 108544 | Author: peace | Hits:

[VHDL-FPGA-Verilog] c_xapp260

Description: xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。-The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing Warfare and Xilinx solutions, but also explains how to use Xilinx Software tools and hardware-proven reference designs to be for your own With (from low-cost DDR SDRAM applications to such as 667 Mb/s This higher performance DDR2 SDRAM interface) design a complete deposit Storage device interface solution.
Platform: | Size: 1123328 | Author: 陈阳 | Hits:

[Embeded-SCM Develop] This_is_pci-wishbone_nuclear_and_16450_serial_port

Description: 这是用pci-wishbone核和16450串口核在xilinx的FPGA上实现的。-This is pci-wishbone nuclear and 16450 serial port on the nucleus in xilinx FPGA-implemented.
Platform: | Size: 8428544 | Author: iceskull | Hits:

[Software Engineering] sincos

Description: 正弦和余弦波在xilinx FPGA中的产生方法， 有look up table方法-Sine and cosine wave in xilinx FPGA in the production method, and a look up table method
Platform: | Size: 120832 | Author: Jim Lai | Hits:

[Software Engineering] IT_ArberNgjela_StefanoMagnoni_2008_TesiSlide

Description: VGA over xilinx fpga
Platform: | Size: 2913280 | Author: magno86 | Hits:

[Other] ML506_photo

Description: XILINX ML506 开发板高清晰照片，用于学习virtex-5.-The photo of xilix ML506 board,there are high clear,using for learning VIETEX-5.
Platform: | Size: 3245056 | Author: luoda | Hits:

[Other] AM_VHDL

Description: AM Demodulator using VHDL for Xilinx FPGA. ISE software
Platform: | Size: 6144 | Author: ali | Hits:

[VHDL-FPGA-Verilog] Xilinx_Tutorial

Description: XILINX FPGA TUTORIALS PDF FILE
Platform: | Size: 1398784 | Author: 甘福连 | Hits:

[VHDL-FPGA-Verilog] mimzy

Description: FPGA ucLinux Board reference design, using Xilinx s Spartan3 FPGA (XC3S400)
Platform: | Size: 978944 | Author: kamejoko80 | Hits:

[VHDL-FPGA-Verilog] Nexys_sch

Description: annother FPGA ucLinux Board reference design, using Xilinx s Spartan3 FPGA (XC3S400)
Platform: | Size: 2082816 | Author: kamejoko80 | Hits:

[Other] xilinx

Description: xilinx中文培训材料，非常好的FPGA学习资料-xilinx Chinese language training materials, a very good learning materials FPGA
Platform: | Size: 3704832 | Author: 小金 | Hits:

[VHDL-FPGA-Verilog] Avt3S400A_Eval_MB_I2C_temp_v10_1_00

Description: xilinx fpga edk开发实例，用I2C总线控制温度传感器-xilinx fpga edk development examples, with the I2C bus control temperature sensor
Platform: | Size: 477184 | Author: 包宰 | Hits:

[Software Engineering] DesignandFPGAImplementationof

Description: In most cases, a bandpass filter characteristic is obtained by using a lowpass-to-bandpass frequency transformation on a known lowpass transfer function. This frequency transformation controls the location of passband edges and transfer zero frequencies completely. Using the “Vlach-Chebyshev approximation” [1] however, we are able to specify the (Chebyshev) passband limits directly, together with a free choice of transfer zero locations in the stopband. In this way it is possible to design bandpass transfer functions that cannot be obtained from lowpass functions by a frequency transformation. We think this method to be the only (and not very well known) analytical method to obtain such bandpass characteristics. We show how we designed wave digital realizations from the specification, through a VHDL description and synthesis into a Xilinx FPGA (Virtex-II).
Platform: | Size: 195584 | Author: rakesh | Hits:

[VHDL-FPGA-Verilog] mouse

Description: Source code PS2 mouse for Xilinx FPGA Spartan 3E.
Platform: | Size: 2048 | Author: sim210 | Hits:

[VHDL-FPGA-Verilog] sdram_control.RAR

Description: 基于XILINX FPGA的SDRAM 控制器代码。VERILOG HDL代码编写-SDRAM CONTROLER
Platform: | Size: 3695616 | Author: bigchop ma | Hits:

[VHDL-FPGA-Verilog] xilinxfpga

Description: Xilinx FPGA VerilogHDL 典型入门实例-Xilinx FPGA VerilogHDL
Platform: | Size: 2116608 | Author: 王新库 | Hits:

[Education soft system] timer

Description: This application is about the Timer in the Xilinx FPGA. It suits students in the college who have little knowlege about the FPGA.
Platform: | Size: 4576256 | Author: sinong | Hits:

[VHDL-FPGA-Verilog] code_huffman

Description: this code implements huffman coding on Xilinx FPGA.the code is designed for Xilinx SDK
Platform: | Size: 2048 | Author: tronix | Hits:
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